1. Field
Some example embodiments of the present inventive concepts relate to a method of fabricating a semiconductor device and, more particularly, to a method of fabricating a semiconductor device using a double patterning process.
2. Description of the Related Art
As a design rule of a semiconductor device decreased, forming fine patterns may be useful in realizing highly-integrated semiconductor device. A double patterning technology (DPT) may be useful to form a fine pattern, whose dimension is smaller than the minimum size that can be achieved by a photolithography process.
The double patterning technology may be generally classified into a self-alignment double patterning (SADP) process and a self-alignment reversed patterning (SARP) process. The SARP process may include operations of forming spacers on both sidewalls of each pattern of a set of patterns, selectively removing the patterns, and patterning an underlying layer using the spacers as an etch mask. The SADP process may include operations of forming spacers between patterns, removing spacers, and patterning an underlying layer using the patterns as an etch mask.